gf180 mimcap: real model name, and emit a capacitor rather than a subckt call - #109
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carloscl03 wants to merge 2 commits into
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gf180 mimcap: real model name, and emit a capacitor rather than a subckt call#109carloscl03 wants to merge 2 commits into
carloscl03 wants to merge 2 commits into
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'mimcap_1p0fF' no es ningun modelo de gf180: los reales son cap_mim_1f0fF, cap_mim_1f5fF y cap_mim_2f0fF. Prefijo invertido y 'p' por 'f'. Cualquier netlist de referencia que glayout generase para una celda con MIM nombraba un dispositivo inexistente, asi que el LVS no podia emparejarlo nunca con el cap_mim_* que sale de la extraccion. Se pone 2f0 porque es lo que asumen las cuatro variantes del runset de LVS del PDK (mim_cap=2 en todas). Cual corre la fabrica sigue siendo una decision de proceso.
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Two small things that kept the gf180 mimcap out of every LVS run.
The model name did not exist.
gf180_mapped.pymapped'mimcap'tocap_mim_1p0fF, which is not in the PDK. The three real models arecap_mim_1f0fF,cap_mim_1f5fFandcap_mim_2f0fF. Any netlist emitted fora gf180 mimcap named a device the simulator and the LVS reader had never
heard of.
Xis a subcircuit call, not a capacitor. The netlist emittedso the LVS reader built a subcircuit instance and never a capacitor device.
The extracted MIM then had nothing to pair with and was reported as a
layout-only device, no matter how the schematic side was arranged. The fets
go through an equivalent
X->Mrewrite in the gf180 runner for the samereason.
In the opamp this was the last mismatch standing: with
C1it pairs and thecell matches. Verified with
tests/lvs/run_cell_lvs.py --pdk gf180; needs#108 for the runner to extract the MIM at all.