tests/lvs: extract gf180 with the MIM option glayout actually draws - #108
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carloscl03 wants to merge 4 commits into
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tests/lvs: extract gf180 with the MIM option glayout actually draws#108carloscl03 wants to merge 4 commits into
carloscl03 wants to merge 4 commits into
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run_lvs.py solo acepta cuatro variantes predefinidas:
A -> mim_option=A metal_level=3LM
B -> mim_option=B metal_level=4LM
C -> mim_option=B metal_level=5LM
D -> mim_option=B metal_level=5LM
y ninguna sirve. glayout dibuja el MIM en opcion A -- met2 / FuseTop /
met3 -- y rutea hasta met5. Esa combinacion es un proceso real: el DRM la
documenta como 1P5M (TM 6KA with MIM). Simplemente no esta en la lista.
Con D, que es lo que habia, el extractor busca el MIM entre metal4 y
metal5 y encuentra uno de los seis condensadores del opamp. Con A pierde
todo el ruteo por encima de met3: diff_pair_ibias se queda sin su pin VSS,
que vive en met4, y el opamp pasa de 8 mismatches a 73.
El deck si acepta las opciones sueltas, asi que se le llama directamente.
gf180 pasa de 5/8 a 7/8; solo queda el opamp.
Y nmos_narrow/pmos_narrow salen de la lista de LVS: son celdas de
regresion de DRC para el dogbone, primitivos pelados cuyo subckt de
referencia se llama como el dispositivo y no como la celda, asi que el LVS
aborta sin reportar nada util. Las anadimos nosotros al CI de DRC y se
colaron aqui.
This was referenced Aug 16, 2026
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The gf180 LVS runner reported 5 of 8 cells passing. Three of those failures
were the runner's own configuration, not the cells.
The runset variant does not match what glayout draws.
run_lvs.pyonlyoffers four preset variants, and none is
mim_option=Awith 5 metal levels.Variant D was being used, which extracts the MIM between metal4 and metal5,
while glayout's gf180 mimcap sits on met2/FuseTop/met3. That combination is a
real process option — the DRM documents
1P5M (TM 6KA with MIM)— it justisn't one of the presets, so the deck is now called directly with the loose
options.
The deck's option A branch is broken upstream.
mimcap_connections.lvsconnects the bottom plate to
metal2rather thanmetal2_con, which is thelayer the connectivity graph is built from, and never bridges
via2_captometal3_con. Option B, right next to it, has all three connects. Withoutthem both MIM plates float. The runner now patches its own copy of the deck
and falls back to the original if the text is not recognised, so a fixed PDK
keeps working.
Same GDS, same netlist, only the deck changed:
Net names were missing from the extraction.
spice_net_namesdefaults tofalse in the deck;
run_lvs.pysets it to true. Calling the deck directlydropped it, so every net came out numbered and the GDS labels never reached
the report -- which showed up as seven phantom "extra top-level pins".
Worth reporting the two
connect()statements to GlobalFoundries; the patchhere is a workaround, not a fix.