SP RISC-V 64-bit: new implementation

[SparkiDev]

Implementation of SM2 for RISC-V 64-bit in SP.
Also fixed the generation of other platforms and update the generated output.

[dgarske]

Build: --enable-sm2 --enable-sm3 --enable-sm4-gcm --enable-sm4-cbc --enable-sp --enable-riscv-asm, differing only by --enable-sp-asm. Confirmed the intended objects are linked: the asm build compiles sp_sm2_riscv64.o, the control compiles sp_sm2_c64.o.

Operation	sp_sm2_c64.c (C)	sp_sm2_riscv64.c (asm)	Speedup
SM2 key gen	515.9 ops/s	890.3 ops/s	1.73x
SM2 ECDHE agree	185.9 ops/s	362.5 ops/s	1.95x
SM2 ECDSA sign	407.9 ops/s	712.2 ops/s	1.75x
SM2 ECDSA verify	170.8 ops/s	333.8 ops/s	1.95x
SM3	7.644 MiB/s	7.725 MiB/s	1.01x
SM4-CBC encrypt	7.782 MiB/s	7.776 MiB/s	1.00x

Reading of the numbers

A solid 1.45x to 2.07x on everything the NIST backend covers, and 1.73x to 1.95x on SM2, with RSA private-key and SM2 agree/verify gaining most. Everything the backend does not cover is flat: Brainpool P-256 falls through to the generic path in both builds, and AES, SHA-256, SM3 and SM4 are governed by --enable-riscv-asm instead, which neither PR touches. No regressions anywhere.