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wangplin/README.md

Hi there 👋

I'm Peilin Wang, a second-year master's student at the School of Microelectronics Science and Techonology , Sun Yat-Sen University. My research focuses on chiplet-based architecture, on-chip/package network and multi-chip GPU.

  • 🎓 Earned my B.Eng. in Microelectronics Science and Engineering from Sun Yat-Sen University (SYSU) in 2024.

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I Mostly Code in C++

C++                      18 repos            █████████████░░░░░░░░░░░░   51.43 % 
Python                   7 repos             █████░░░░░░░░░░░░░░░░░░░░   20.00 % 
Verilog                  4 repos             ███░░░░░░░░░░░░░░░░░░░░░░   11.43 % 
TeX                      2 repos             █░░░░░░░░░░░░░░░░░░░░░░░░   05.71 % 
HTML                     1 repo              █░░░░░░░░░░░░░░░░░░░░░░░░   02.86 %

Last Updated on 31/07/2026 20:01:45 UTC

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  1. CAL-UniCNet CAL-UniCNet Public

    UniCNet is a cycle-accurate simulator supporting effienct simulation for composable chiplet networks.

    C++ 6

  2. cpicic_2025_CAM_research_team cpicic_2025_CAM_research_team Public

    Verilog 2

  3. SYSU_MST_Thesis_Proposal_Template SYSU_MST_Thesis_Proposal_Template Public

    TeX 3