use zero-extension in the loongarch64 crc32 implementation#2148
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r? sayantn |
| @@ -64,14 +64,14 @@ unsafe extern "unadjusted" { | |||
| #[inline(always)] | |||
| #[unstable(feature = "stdarch_loongarch", issue = "117427")] | |||
| pub fn crc_w_b_w(a: i8, b: i32) -> i32 { | |||
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Should the signatures be signed or unsigned? Because typically crypto always uses unsigned
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Clang uses signed, see also discussion at #2137 (comment)
| } | ||
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| #[cfg_attr(target_arch = "arm", target_feature(enable = "crc,v8"))] | ||
| #[cfg_attr(not(target_arch = "arm"), target_feature(enable = "crc"))] |
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I think you meant to use simd_test here instead of target_feature
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Should be good now, we can't run this on arm at the moment due to the feature detection macro not supporting a feature we need. |
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Would it make sense to handle this in Miri instead? Casting to an unsigned type isn't free, and fn crc32_test(a: i8, b:i8) -> i32 {
let r = crc_w_b_w(a, -1);
crc_w_b_w(b, r)
}b4800: 02fffc06 li.d $a2, -1
b4804: 00241884 crc.w.b.w $a0, $a0, $a2
b4808: 002410a4 crc.w.b.w $a0, $a1, $a0
b480c: 4c000020 ret-> b4800: 0343fc84 andi $a0, $a0, 0xff
b4804: 02fffc06 li.d $a2, -1
b4808: 00241884 crc.w.b.w $a0, $a0, $a2
b480c: 0343fca5 andi $a1, $a1, 0xff
b4810: 002410a4 crc.w.b.w $a0, $a1, $a0
b4814: 4c000020 ret |
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I'd expect LLVM to optimize the mask out when the instruction that uses the result won't look at the upper bits anyway? |
Using sign extension caused some issues in miri which actually checks the range of the input.