net: stmmac: qcom-ethqos: Add Shikra EMAC v4.0.1 support#1317
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net: stmmac: qcom-ethqos: Add Shikra EMAC v4.0.1 support#1317ayaan-anwar wants to merge 2 commits into
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The Shikra SoC contains two EMAC (v4.0.1) instances that are compatible with the existing Qualcomm ETHQOS driver. These controllers require three additional clocks beyond the standard four: an AXI bus clock, an AXI system-NOC clock, and a PCIe-tile AXI NOC clock that must be explicitly managed by the driver. Add the qcom,shikra-ethqos compatible string and extend the clock-names schema with a oneOf variant that covers this seven-clock configuration. The AXI clock is intentionally listed twice (as both "stmmaceth" and "axi"): the stmmac core framework consumes the first entry while the driver's NOC bulk-clock array consumes the second; CCF reference counting makes this safe. Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
The Shikra SoC integrates two EMAC v4.0.1 instances that differ from the existing v4.0.0 (SA8775P) in three ways: 1. NOC clocks: Three additional clocks (axi, axi-noc, pcie-tile-axi-noc) must be explicitly enabled by the driver. Introduce ethqos_noc_clk_cfg and the corresponding noc_clk_cfg/num_noc_clks fields in the driver-data struct so each compatible can declare its own set with per-clock rates. The clocks are enabled/disabled alongside the existing link clock in ethqos_clks_config(). 2. RGMII tuning: The DLL lock status bit has moved to BIT(0) in the SDC4_STATUS register (SDC4_STATUS_SHIKRA_DLL_LOCK). The IOMACRO sequence also differs; introduce ethqos_configure_rgmii_shikra() and wire it up via a configure_rgmii callback in the driver-data struct so it short-circuits the generic POR-restore path. 3. MAC-managed RGMII delay: The MAC adds internal TX/RX delays, so when the DT specifies "rgmii-id" the driver downgrades the PHY interface to plain "rgmii" to prevent double-application of the delay. Register qcom,shikra-ethqos in the OF match table backed by the new emac_v4_0_1_data descriptor. Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
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This series adds support for the Qualcomm Shikra SoC EMAC v4.0.1 controllers to the
dwmac-qcom-ethqosdriver along with the required DT binding updates.Summary of changes
DT bindings
qcom,shikra-ethqosclock-namesschema to support a 7-clock configuration:axiaxi-nocpcie-tile-axi-nocaxiappears twice (stmmacethandaxi) to satisfy both stmmac core and driver bulk clock usage. This is safe due to CCF reference counting.Driver support (EMAC v4.0.1)
Introduce a new
emac_v4_0_1_dataconfiguration and register it via OF match.Key differences compared to EMAC v4.0.0:
NOC clock handling
ethqos_noc_clk_cfgnoc_clk_cfg/num_noc_clksin driver dataethqos_clks_config()to handle these clocks along with existing onesRGMII configuration changes
BIT(0)inSDC4_STATUSSDC4_STATUS_SHIKRA_DLL_LOCKethqos_configure_rgmii_shikra()configure_rgmiicallback to override the generic pathMAC-managed RGMII delays
"rgmii-id", driver downgrades to"rgmii"to avoid double delay applicationResult