feat: add serializer w/o PHY

[Lore0599]

Split serializer from PHY

This PR introduces an intermediate module, slink_serializer, which handles converting the AXI protocol into AXI-Stream and splitting the payload into packets.

This refactor enables the following:

• The protocol/control-flow logic can be reused with different PHY implementations (e.g., UCIe).
• Moving slink_reg out of the serializer allows multiple serializers (and eventually serial links) to be instantiated in the same design, each with its own parametrization. This isn't currently possible: once a downstream project depends on the serial link, IP parameters such as NumChannels, NumLanes, and EnDdr are inherited directly from the generated RDL, tying every instance to the same configuration.

[taitashaw]

The new phy_data_* interface in slink_serializer.sv reads as a symmetric valid/ready handshake in both directions, but on the reference PHY the RX-side ready carries no backpressure authority. In slink_phys_layer.sv the receive CDC (i_cdc_in) ties src_valid_i to 1'b1 and leaves src_ready_o unconnected (around lines 144-146), so words recovered off the wire are enqueued unconditionally; data_in_ready_i (the serializer's phy_data_in_ready_o) gates only the drain side. The CdcRxFifoFull overrun assertion that would flag this is commented out just below.

So backpressure is owned above the seam by the serializer's credit scheme, not by the PHY. credit_t travels in-band inside payload_t, and RecvFifoDepth = NumCredits * PayloadSplits sizes the receive path so credits, not wire-level ready, prevent overflow. Packet boundaries sit above the seam as well: the PHY sees only opaque fixed-width phy_data_t words with no framing, the data-link layer rebuilds a payload by counting PayloadSplits words, and multi-channel alignment leans on the channel allocator's cfg_rx_sync_en.

The implication for a different backend such as UCIe/RDI is that it must reproduce the same lossless, in-order, word-aligned, credit-bounded delivery, because the serializer carries no per-word framing to resync after a dropped or inserted word, and its RX ready is not a stall the way RDI's pl_trdy/valid semantics are. I have only read this repo at HEAD (911b32c); I have not seen the RDI adapter, so whether it closes that gap I cannot say from here.

[fischeti]

The new module looks good to me, but I feel like the conversion handling could be simplified

[fischeti]

Just one more thing, then we can merge it, I think.