Hierarchical organisation of the register address map

Bender.yml

@@ -41,13 +41,15 @@ sources:
       files:
         - src/hyperbus_delay.sv
 
+    - src/regs/hyperbus_cfg_regblock_pkg.sv
     - src/hyperbus_pkg.sv
     - src/hyperbus_clk_gen.sv
     - src/hyperbus_clock_diff_out.sv
     - src/hyperbus_w2phy.sv
     - src/hyperbus_phy2r.sv
     - src/hyperbus_ddr_out.sv
     - src/hyperbus_trx.sv
+    - src/regs/hyperbus_cfg_regblock.sv
     - src/hyperbus_cfg_regs.sv
     - src/hyperbus_phy.sv
     - src/hyperbus_phy_if.sv
@@ -63,4 +65,5 @@ sources:
         - test/dut_if.sv
         - test/hyperbus_tb_pkg.sv
         - test/axi_hyper_tb.sv
+        - test/hyperbus_cfg_regs_tb.sv
     - src/hyperbus.sv

Makefile

@@ -12,6 +12,9 @@ all: build run
 
 clean: sim_clean
 
+update-regs:
+	bash scripts/gen_regs.sh
+
 # Ensure half-built targets are purged
 .DELETE_ON_ERROR: