Skip to content

[RISCV][P-ext] Add DefVXSAT argument to tablegen classes. NFC#199797

Open
topperc wants to merge 1 commit into
llvm:mainfrom
topperc:pr/vxsat
Open

[RISCV][P-ext] Add DefVXSAT argument to tablegen classes. NFC#199797
topperc wants to merge 1 commit into
llvm:mainfrom
topperc:pr/vxsat

Conversation

@topperc
Copy link
Copy Markdown
Contributor

@topperc topperc commented May 26, 2026

Sink the lets Defs = [VXSAT] into the classs.

This makes the encoding based structure of this file more consistent.

@topperc
[RISCV][P-ext] Add DefVXSAT argument to tablegen classes. NFC
9cec0df 
Sink the lets Defs = [VXSAT] into the classs.

This makes the encoding based structure of this file more consistent.
@llvmorg-github-actions
Copy link
Copy Markdown

llvmorg-github-actions Bot commented May 26, 2026

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

Sink the lets Defs = [VXSAT] into the classs.

This makes the encoding based structure of this file more consistent.

Patch is 43.06 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/199797.diff

1 Files Affected:

  • (modified) llvm/lib/Target/RISCV/RISCVInstrInfoP.td (+178-263)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
index 37c33d27647bf..12436b33fe09e 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
@@ -179,7 +179,7 @@ class RVPWideningBase<bits<4> f, bits<2> w, bit arith_shift, dag outs, dag ins,
 
 // Common base for narrowing ops
 class RVPNarrowingBase<bits<3> f, bit r, bits<4> funct4, dag outs, dag ins,
-                      string opcodestr, string argstr>
+                      string opcodestr, string argstr, bit DefVXSAT = 0>
   : RVInst<outs, ins, opcodestr, argstr, [], InstFormatOther> {
   bits<5> rs1;
   bits<5> rd;
@@ -191,11 +191,13 @@ class RVPNarrowingBase<bits<3> f, bit r, bits<4> funct4, dag outs, dag ins,
   let Inst{15-12} = funct4;
   let Inst{11-7}  = rd;
   let Inst{6-0}   = OPC_OP_IMM_32.Value;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 // Common base for pair ops (non-widening nor narrowing)
 class RVPPairBase<bits<4> f, bit direction, dag outs, dag ins,
-                  string opcodestr, string argstr>
+                  string opcodestr, string argstr, bit DefVXSAT>
   : RVInst<outs, ins, opcodestr, argstr, [], InstFormatOther> {
   bits<5> rs1;
   bits<5> rd;
@@ -207,14 +209,16 @@ class RVPPairBase<bits<4> f, bit direction, dag outs, dag ins,
   let Inst{11-8}  = rd{4-1};
   let Inst{7}     = 0b0;
   let Inst{6-0}   = OPC_OP_IMM_32.Value;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 // Common base for pair binary ops
 class RVPPairBinaryBase_rr<bits<4> f, bits<2> w, bit pack, bit direction,
-                           string opcodestr>
+                           string opcodestr, bit DefVXSAT = 0>
     : RVPPairBase<f, direction, (outs GPRPairRV32:$rd),
                   (ins GPRPairRV32:$rs1, GPRPairRV32:$rs2), opcodestr,
-                  "$rd, $rs1, $rs2"> {
+                  "$rd, $rs1, $rs2", DefVXSAT> {
   bits<5> rs2;
 
   let Inst{31}    = 0b1;
@@ -224,18 +228,21 @@ class RVPPairBinaryBase_rr<bits<4> f, bits<2> w, bit pack, bit direction,
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPShift_ri<bits<3> f, bits<3> funct3, string opcodestr, Operand ImmType>
+class RVPShift_ri<bits<3> f, bits<3> funct3, string opcodestr, Operand ImmType,
+                  bit DefVXSAT = 0>
     : RVInstIBase<funct3, OPC_OP_IMM_32, (outs GPR:$rd),
                   (ins GPR:$rs1, ImmType:$shamt), opcodestr,
                   "$rd, $rs1, $shamt"> {
   let Inst{31}    = 0b1;
   let Inst{30-28} = f;
   let Inst{27}    = 0b0;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 class RVPShiftD_ri<bits<3> f, bits<3> funct3, string opcodestr,
-                   Operand ImmType = uimm6>
-    : RVPShift_ri<f, funct3, opcodestr, ImmType> {
+                   Operand ImmType = uimm6, bit DefVXSAT = 0>
+    : RVPShift_ri<f, funct3, opcodestr, ImmType, DefVXSAT> {
   bits<6> shamt;
 
   let Inst{26} = 0b1;
@@ -243,8 +250,8 @@ class RVPShiftD_ri<bits<3> f, bits<3> funct3, string opcodestr,
 }
 
 class RVPShiftW_ri<bits<3> f, bits<3> funct3, string opcodestr,
-                   Operand ImmType = uimm5>
-    : RVPShift_ri<f, funct3, opcodestr, ImmType> {
+                   Operand ImmType = uimm5, bit DefVXSAT = 0>
+    : RVPShift_ri<f, funct3, opcodestr, ImmType, DefVXSAT> {
   bits<5> shamt;
 
   let Inst{26-25} = 0b01;
@@ -252,8 +259,8 @@ class RVPShiftW_ri<bits<3> f, bits<3> funct3, string opcodestr,
 }
 
 class RVPShiftH_ri<bits<3> f, bits<3> funct3, string opcodestr,
-                   Operand ImmType = uimm4>
-    : RVPShift_ri<f, funct3, opcodestr, ImmType> {
+                   Operand ImmType = uimm4, bit DefVXSAT = 0>
+    : RVPShift_ri<f, funct3, opcodestr, ImmType, DefVXSAT> {
   bits<4> shamt;
 
   let Inst{26-24} = 0b001;
@@ -315,29 +322,30 @@ class RVPWideningShiftB_ri<bits<3> f, string opcodestr>
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPNarrowingShift_ri<bits<3> f, string opcodestr, Operand ImmType>
+class RVPNarrowingShift_ri<bits<3> f, string opcodestr, Operand ImmType,
+                           bit DefVXSAT>
     : RVPNarrowingBase<f, 0b0, 0b1100, (outs GPR:$rd),
                        (ins GPRPairRV32:$rs1, ImmType:$shamt), opcodestr,
-                       "$rd, $rs1, $shamt">;
+                       "$rd, $rs1, $shamt", DefVXSAT>;
 
-class RVPNarrowingShiftW_ri<bits<3> f, string opcodestr>
-    : RVPNarrowingShift_ri<f, opcodestr, uimm6> {
+class RVPNarrowingShiftW_ri<bits<3> f, string opcodestr, bit DefVXSAT = 0>
+    : RVPNarrowingShift_ri<f, opcodestr, uimm6, DefVXSAT> {
   bits<6> shamt;
 
   let Inst{26} = 0b1;
   let Inst{25-20} = shamt;
 }
 
-class RVPNarrowingShiftH_ri<bits<3> f, string opcodestr>
-    : RVPNarrowingShift_ri<f, opcodestr, uimm5> {
+class RVPNarrowingShiftH_ri<bits<3> f, string opcodestr, bit DefVXSAT = 0>
+    : RVPNarrowingShift_ri<f, opcodestr, uimm5, DefVXSAT> {
   bits<5> shamt;
 
   let Inst{26-25} = 0b01;
   let Inst{24-20} = shamt;
 }
 
-class RVPNarrowingShiftB_ri<bits<3> f, string opcodestr>
-    : RVPNarrowingShift_ri<f, opcodestr, uimm4> {
+class RVPNarrowingShiftB_ri<bits<3> f, string opcodestr, bit DefVXSAT = 0>
+    : RVPNarrowingShift_ri<f, opcodestr, uimm4, DefVXSAT> {
   bits<4> shamt;
 
   let Inst{26-24} = 0b001;
@@ -345,24 +353,26 @@ class RVPNarrowingShiftB_ri<bits<3> f, string opcodestr>
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPPairShift_ri<bits<3> f, string opcodestr, Operand ImmType, 
-                      bit direction>
+class RVPPairShift_ri<bits<3> f, string opcodestr, Operand ImmType,
+                      bit direction, bit DefVXSAT = 0>
     : RVPPairBase<{f, 0b0}, direction, (outs GPRPairRV32:$rd),
                   (ins GPRPairRV32:$rs1, ImmType:$shamt), opcodestr,
-                  "$rd, $rs1, $shamt"> {
+                  "$rd, $rs1, $shamt", DefVXSAT> {
   let Inst{31}    = 0b0;
 }
 
-class RVPPairShiftW_ri<bits<3> f, string opcodestr, bit direction = 0b0>
-    : RVPPairShift_ri<f, opcodestr, uimm5, direction> {
+class RVPPairShiftW_ri<bits<3> f, string opcodestr, bit direction = 0b0,
+                       bit DefVXSAT = 0>
+    : RVPPairShift_ri<f, opcodestr, uimm5, direction, DefVXSAT> {
   bits<5> shamt;
 
   let Inst{26-25} = 0b01;
   let Inst{24-20} = shamt;
 }
 
-class RVPPairShiftH_ri<bits<3> f, string opcodestr, bit direction = 0b0>
-    : RVPPairShift_ri<f, opcodestr, uimm4, direction> {
+class RVPPairShiftH_ri<bits<3> f, string opcodestr, bit direction = 0b0,
+                       bit DefVXSAT = 0>
+    : RVPPairShift_ri<f, opcodestr, uimm4, direction, DefVXSAT> {
   bits<4> shamt;
 
   let Inst{26-24} = 0b001;
@@ -378,10 +388,11 @@ class RVPPairShiftB_ri<bits<3> f, string opcodestr, bit direction = 0b0>
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPNarrowingShift_rr<bits<3> f, bits<2> w, string opcodestr>
+class RVPNarrowingShift_rr<bits<3> f, bits<2> w, string opcodestr,
+                           bit DefVXSAT = 0>
     : RVPNarrowingBase<f, 0b1, 0b1100, (outs GPR:$rd),
                        (ins GPRPairRV32:$rs1, GPR:$rs2), opcodestr,
-                       "$rd, $rs1, $rs2"> {
+                       "$rd, $rs1, $rs2", DefVXSAT> {
   bits<5> rs2;
 
   let Inst{26-25} = w;
@@ -395,10 +406,10 @@ class RVPWideningShift_rr<bits<3> f, bits<2> w, string opcodestr>
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPPairShift_rr<bits<3> f, bits<2> w, string opcodestr,
-                      bit direction = 0b0>
+                      bit direction = 0b0, bit DefVXSAT = 0>
     : RVPPairBase<{f, 0b1}, direction, (outs GPRPairRV32:$rd),
                   (ins GPRPairRV32:$rs1, GPR:$rs2), opcodestr,
-                  "$rd, $rs1, $rs2"> {
+                  "$rd, $rs1, $rs2", DefVXSAT> {
   bits<5> rs2;
 
   let Inst{26-25} = w;
@@ -406,36 +417,41 @@ class RVPPairShift_rr<bits<3> f, bits<2> w, string opcodestr,
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPUnary_ri<bits<2> w, bits<5> uf, string opcodestr>
+class RVPUnary_ri<bits<2> w, bits<5> uf, string opcodestr, bit DefVXSAT = 0>
     : RVInstIBase<0b010, OPC_OP_IMM_32, (outs GPR:$rd), (ins GPR:$rs1),
                   opcodestr, "$rd, $rs1">  {
   let Inst{31-27} = 0b11100;
   let Inst{26-25} = w;
   let Inst{24-20} = uf;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPPairUnary_r<bits<2> w, bits<5> uf, string opcodestr>
+class RVPPairUnary_r<bits<2> w, bits<5> uf, string opcodestr, bit DefVXSAT = 0>
     : RVPPairBase<0b1100, 0b0, (outs GPRPairRV32:$rd),
-                  (ins GPRPairRV32:$rs1), opcodestr, "$rd, $rs1"> {
+                  (ins GPRPairRV32:$rs1), opcodestr, "$rd, $rs1", DefVXSAT> {
   let Inst{31}    = 0b0;
   let Inst{26-25} = w;
   let Inst{24-20} = uf;
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPBinaryScalar_rr<bits<3> f, bits<2> w, bits<3> funct3, string opcodestr>
+class RVPBinaryScalar_rr<bits<3> f, bits<2> w, bits<3> funct3, string opcodestr,
+                         bit DefVXSAT = 0>
     : RVInstRBase<funct3, OPC_OP_IMM_32, (outs GPR:$rd),
                   (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2"> {
   let Inst{31} = 0b1;
   let Inst{30-28} = f;
   let Inst{27} = 0b1;
   let Inst{26-25} = w;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPBinary_rr<bits<4> f, bits<2> w, bits<3> funct3, string opcodestr,
-                   bit Commutable = 0>
+                   bit Commutable = 0, bit DefVXSAT = 0>
     : RVInstRBase<funct3, OPC_OP_32, (outs GPR:$rd),
                   (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2"> {
   assert !or(!eq(funct3{0}, 0), !eq(f{0}, 0)),
@@ -445,6 +461,8 @@ class RVPBinary_rr<bits<4> f, bits<2> w, bits<3> funct3, string opcodestr,
   let Inst{26-25} = w;
 
   let isCommutable = Commutable;
+
+  let Defs = !if(DefVXSAT, [VXSAT], []);
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
@@ -469,14 +487,15 @@ class RVPNarrowingBinary_rr<bits<3> f, bits<2> w, string opcodestr>
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPPairBinary_rr<bits<4> f, bits<2> w, string opcodestr,
-                       bit Commutable = 0>
-    : RVPPairBinaryBase_rr<f, w, 0b0, 0b0, opcodestr> {
+                       bit Commutable = 0, bit DefVXSAT = 0>
+    : RVPPairBinaryBase_rr<f, w, 0b0, 0b0, opcodestr, DefVXSAT> {
   let isCommutable = Commutable;
 }
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVPPairBinaryShift_rr<bits<3> f, bits<2> w, string opcodestr>
-    : RVPPairBinaryBase_rr<{f, 0b0}, w, 0b1, 0b0, opcodestr>;
+class RVPPairBinaryShift_rr<bits<3> f, bits<2> w, string opcodestr,
+                            bit DefVXSAT = 0>
+    : RVPPairBinaryBase_rr<{f, 0b0}, w, 0b1, 0b0, opcodestr, DefVXSAT>;
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPPairBinaryPack_rr<bits<3> f, bits<2> w, string opcodestr>
@@ -484,8 +503,8 @@ class RVPPairBinaryPack_rr<bits<3> f, bits<2> w, string opcodestr>
 
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVPPairBinaryExchanged_rr<bits<4> f, bits<2> w, string opcodestr,
-                                bit Commutable = 0>
-    : RVPPairBinaryBase_rr<f, w, 0b1, 0b1, opcodestr> {
+                                bit Commutable = 0, bit DefVXSAT = 0>
+    : RVPPairBinaryBase_rr<f, w, 0b1, 0b1, opcodestr, DefVXSAT> {
   let isCommutable = Commutable;
 }
 
@@ -557,18 +576,15 @@ let Predicates = [HasStdExtP] in {
   def PSLLI_B  : RVPShiftB_ri<0b000, 0b010, "pslli.b">;
   def PSLLI_H  : RVPShiftH_ri<0b000, 0b010, "pslli.h">;
 
-  let Defs = [VXSAT] in
-  def PSSLAI_H : RVPShiftH_ri<0b101, 0b010, "psslai.h">;
+  def PSSLAI_H : RVPShiftH_ri<0b101, 0b010, "psslai.h", DefVXSAT=1>;
 } // Predicates = [HasStdExtP]
 let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
-  let Defs = [VXSAT] in
-  def SSLAI    : RVPShiftW_ri<0b101, 0b010, "sslai">;
+  def SSLAI    : RVPShiftW_ri<0b101, 0b010, "sslai", DefVXSAT=1>;
 } // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
 let Predicates = [HasStdExtP, IsRV64] in {
   def PSLLI_W  : RVPShiftW_ri<0b000, 0b010, "pslli.w">;
 
-  let Defs = [VXSAT] in
-  def PSSLAI_W : RVPShiftW_ri<0b101, 0b010, "psslai.w">;
+  def PSSLAI_W : RVPShiftW_ri<0b101, 0b010, "psslai.w", DefVXSAT=1>;
 } // Predicates = [HasStdExtP, IsRV64]
 
 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
@@ -591,10 +607,8 @@ let Predicates = [HasStdExtP] in {
 let Predicates = [HasStdExtP] in {
   def PSEXT_H_B : RVPUnary_ri<0b00, 0b00100, "psext.h.b">;
 
-  let Defs = [VXSAT] in {
-  def PSABS_H   : RVPUnary_ri<0b00, 0b00111, "psabs.h">;
-  def PSABS_B   : RVPUnary_ri<0b10, 0b00111, "psabs.b">;
-  } // Defs = [VXSAT]
+  def PSABS_H   : RVPUnary_ri<0b00, 0b00111, "psabs.h", DefVXSAT=1>;
+  def PSABS_B   : RVPUnary_ri<0b10, 0b00111, "psabs.b", DefVXSAT=1>;
 } // Predicates = [HasStdExtP]
 let Predicates = [HasStdExtP, IsRV64] in {
   def PSEXT_W_B : RVPUnary_ri<0b01, 0b00100, "psext.w.b">;
@@ -615,50 +629,38 @@ let Predicates = [HasStdExtP] in {
   def PADD_HS   : RVPBinaryScalar_rr<0b001, 0b00, 0b010, "padd.hs">;
   def PADD_BS   : RVPBinaryScalar_rr<0b001, 0b10, 0b010, "padd.bs">;
 
-  let Defs = [VXSAT] in
-  def PSSHL_HS  : RVPBinaryScalar_rr<0b010, 0b00, 0b010, "psshl.hs">;
+  def PSSHL_HS  : RVPBinaryScalar_rr<0b010, 0b00, 0b010, "psshl.hs", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def PSSHLR_HS : RVPBinaryScalar_rr<0b011, 0b00, 0b010, "psshlr.hs">;
+  def PSSHLR_HS : RVPBinaryScalar_rr<0b011, 0b00, 0b010, "psshlr.hs", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def PSSHA_HS  : RVPBinaryScalar_rr<0b110, 0b00, 0b010, "pssha.hs">;
+  def PSSHA_HS  : RVPBinaryScalar_rr<0b110, 0b00, 0b010, "pssha.hs", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def PSSHAR_HS : RVPBinaryScalar_rr<0b111, 0b00, 0b010, "psshar.hs">;
+  def PSSHAR_HS : RVPBinaryScalar_rr<0b111, 0b00, 0b010, "psshar.hs", DefVXSAT=1>;
 } // Predicates = [HasStdExtP]
 let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
-  let Defs = [VXSAT] in
-  def SSHL      : RVPBinaryScalar_rr<0b010, 0b01, 0b010, "sshl">;
+  def SSHL      : RVPBinaryScalar_rr<0b010, 0b01, 0b010, "sshl", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def SSHLR     : RVPBinaryScalar_rr<0b011, 0b01, 0b010, "sshlr">;
+  def SSHLR     : RVPBinaryScalar_rr<0b011, 0b01, 0b010, "sshlr", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def SSHA      : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "ssha">;
+  def SSHA      : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "ssha", DefVXSAT=1>;
 
-  let Defs = [VXSAT] in
-  def SSHAR     : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "sshar">;
+  def SSHAR     : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "sshar", DefVXSAT=1>;
 } // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
 let Predicates = [HasStdExtP, IsRV64] in {
   def PSLL_WS   : RVPBinaryScalar_rr<0b000, 0b01, 0b010, "psll.ws">;
 
   def PADD_WS   : RVPBinaryScalar_rr<0b001, 0b01, 0b010, "padd.ws">;
 
-  let Defs = [VXSAT] in
-  def PSSHL_WS  : RVPBinaryScalar_rr<0b010, 0b01, 0b010, "psshl.ws">;
+  def PSSHL_WS  : RVPBinaryScalar_rr<0b010, 0b01, 0b010, "psshl.ws", DefVXSAT=1>;
   def SHL       : RVPBinaryScalar_rr<0b010, 0b11, 0b010, "shl">;
 
-  let Defs = [VXSAT] in
-  def PSSHLR_WS : RVPBinaryScalar_rr<0b011, 0b01, 0b010, "psshlr.ws">;
+  def PSSHLR_WS : RVPBinaryScalar_rr<0b011, 0b01, 0b010, "psshlr.ws", DefVXSAT=1>;
   def SHLR      : RVPBinaryScalar_rr<0b011, 0b11, 0b010, "shlr">;
 
-  let Defs = [VXSAT] in
-  def PSSHA_WS  : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "pssha.ws">;
+  def PSSHA_WS  : RVPBinaryScalar_rr<0b110, 0b01, 0b010, "pssha.ws", DefVXSAT=1>;
   def SHA       : RVPBinaryScalar_rr<0b110, 0b11, 0b010, "sha">;
 
-  let Defs = [VXSAT] in
-  def PSSHAR_WS : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "psshar.ws">;
+  def PSSHAR_WS : RVPBinaryScalar_rr<0b111, 0b01, 0b010, "psshar.ws", DefVXSAT=1>;
   def SHAR      : RVPBinaryScalar_rr<0b111, 0b11, 0b010, "shar">;
 } // Predicates = [HasStdExtP, IsRV64]
 
@@ -666,42 +668,34 @@ let Predicates = [HasStdExtP] in {
   def PSRLI_B    : RVPShiftB_ri<0b000, 0b100, "psrli.b">;
   def PSRLI_H    : RVPShiftH_ri<0b000, 0b100, "psrli.h">;
 
-  let Defs = [VXSAT] in
-  def PUSATI_H   : RVPShiftH_ri<0b010, 0b100, "pusati.h">;
+  def PUSATI_H   : RVPShiftH_ri<0b010, 0b100, "pusati.h", DefVXSAT=1>;
 
   def PSRAI_B    : RVPShiftB_ri<0b100, 0b100, "psrai.b">;
   def PSRAI_H    : RVPShiftH_ri<0b100, 0b100, "psrai.h">;
 
   def PSRARI_H   : RVPShiftH_ri<0b101, 0b100, "psrari.h">;
 
-  let Defs = [VXSAT] in
-  def PSATI_H    : RVPShiftH_ri<0b110, 0b100, "psati.h", uimm4_plus1>;
+  def PSATI_H    : RVPShiftH_ri<0b110, 0b100, "psati.h", uimm4_plus1, DefVXSAT=1>;
 } // Predicates = [HasStdExtP]
 let Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only" in {
-  let Defs = [VXSAT] in
-  def USATI_RV32 : RVPShiftW_ri<0b010, 0b100, "usati">;
+  def USATI_RV32 : RVPShiftW_ri<0b010, 0b100, "usati", DefVXSAT=1>;
 
   def SRARI_RV32 : RVPShiftW_ri<0b101, 0b100, "srari">;
 
-  let Defs = [VXSAT] in
-  def SATI_RV32  : RVPShiftW_ri<0b110, 0b100, "sati", uimm5_plus1>;
+  def SATI_RV32  : RVPShiftW_ri<0b110, 0b100, "sati", uimm5_plus1, DefVXSAT=1>;
 } // Predicates = [HasStdExtP, IsRV32], DecoderNamespace = "RV32Only"
 let Predicates = [HasStdExtP, IsRV64] in {
   def PSRLI_W    : RVPShiftW_ri<0b000, 0b100, "psrli.w">;
   def PSRAI_W    : RVPShiftW_ri<0b100, 0b100, "psrai.w">;
 
-  let Defs = [VXSAT] in {
-  def PUSATI_W   : RVPShiftW_ri<0b010, 0b100, "pusati.w">;
-  def USATI_RV64 : RVPShiftD_ri<0b010, 0b100, "usati">;
-  } // Defs = [VXSAT]
+  def PUSATI_W   : RVPShiftW_ri<0b010, 0b100, "pusati.w", DefVXSAT=1>;
+  def USATI_RV64 : RVPShiftD_ri<0b010, 0b100, "usati", DefVXSAT=1>;
 
   def PSRARI_W   : RVPShiftW_ri<0b101, 0b100, "psrari.w">;
   def SRARI_RV64 : RVPShiftD_ri<0b101, 0b100, "srari">;
 
-  let Defs = [VXSAT] in {
-  def PSATI_W    : RVPShiftW_ri<0b110, 0b100, "psati.w", uimm5_plus1>;
-  def SATI_RV64  : RVPShiftD_ri<0b110, 0b100, "sati", uimm6_plus1>;
-  } // Defs = [VXSAT]
+  def PSATI_W    : RVPShiftW_ri<0b110, 0b100, "psati.w", uimm5_plus1, DefVXSAT=1>;
+  def SATI_RV64  : RVPShiftD_ri<0b110, 0b100, "sati", uimm6_plus1, DefVXSAT=1>;
 } // Predicates = [HasStdExtP, IsRV64]
 
 let Predicates = [HasStdExtP] in {
@@ -731,18 +725,14 @@ let Predicates = [HasStdExtP] in {
   def PADD_H   : RVPBinary_rr<0b0000, 0b00, 0b000, "padd.h", Commutable=1>;
   def PADD_B   : RVPBinary_rr<0b0000, 0b10, 0b000, "padd.b", Commutable=1>;
 
-  let Defs = [VXSAT] in {
-  def PSADD_H  : RVPBinary_rr<0b0010, 0b00, 0b000, "psadd.h", Commutable=1>;
-  def PSADD_B  : RVPBinary_rr<0b0010, 0b10, 0b000, "psadd.b", Commutable=1>;
-  } // Defs = [VXSAT]
+  def PSADD_H  : RVPBinary_rr<0b0010, 0b00, 0b000, "psadd.h", Commutable=1, DefVXSAT=1>;
+  def PSADD_B  : RVPBinary_rr<0b0010, 0b10, 0b000, "psadd.b", Commutable=1, DefVXSAT=1>;
 
   def PAADD_H  : RVPBinary_rr<0b0011, 0b00, 0b000, "paadd.h", Commutable=1>;
   def PAADD_B  : RVPBinary_rr<0b0011, 0b10, 0b000, "paadd.b", Commutable=1>;
 
-  let Defs = [VXSAT] in {
-  def PSADDU_H : RVPBinary_rr<0b0110, 0b00, 0b000, "psaddu.h", Commutable=1>;
-  def PSADDU_B : RVPBinary_rr<0b0110, 0b10, 0b000, "psaddu.b", Commutable=1>;
-  } // Defs = [VXSAT]
+  def PSADDU_H : RVPBinary_rr<0b0110, 0b00, 0b000, "psaddu.h", Commutable=1, DefVXSAT=1>;
+  def PSADDU_B : RVPBinary_rr<0b0110, 0b10, 0b000, "psaddu.b", Commutable=1, DefVXSAT=1>;
 
   def PAADDU_H : RVPBinary_rr<0b0111, 0b00, 0b000, "paaddu.h", Commutable=1>;
   def PAADDU_B : RVPBinary_rr<0b0111, 0b10, 0b000, "paaddu.b", Commutable=1>;
@@ -753,10 +743,8 @@ let Predicates = [HasStdExtP] in {
   def PABD_H   : RVPBinary_rr<0b1001, 0b00, 0b000, "pabd.h", Commutable=1>;
   def PABD_B   : RVPBinary_rr<0b1001, 0b10, 0b000, "pabd.b", Commutable=1>;
 
-  let Defs = [VXSAT] in {
-  def PSSUB_H  : RVPBinary_rr<0b1010, 0b00, 0b000, "pssub.h">;
-  def PSSUB_B  : RVPBinary_rr<0b1010, 0b10, 0b000, "pssub.b">;
-  } // Defs = [VXSAT]
+  def PSSUB_H  : RVPBinary_rr<0b1010, 0b00, 0b000, "pssub.h", DefVXSAT=1>;
+  def PSSUB_B  : RVPBinary_rr<0b1010, 0b10, 0b000, "pssub.b", DefVXSAT=1>;
 
   def PASUB_H  : RVPBinary_rr<0b1011, 0b00, 0b000, "pasub.h">;
   def PASUB_B  : RVPBinary_rr<0b1011, 0b10, 0b000, "pasub.b">;
@@ -764,57 +752,47 @@ let Predicates = [Ha...
[truncated]

sihuan
sihuan approved these changes May 27, 2026
View reviewed changes
Copy link
Copy Markdown
Contributor

@sihuan sihuan left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Reviewers

@sihuan sihuan sihuan approved these changes

@lenary lenary Awaiting requested review from lenary

@4vtomat 4vtomat Awaiting requested review from 4vtomat

@wangpc-pp wangpc-pp Awaiting requested review from wangpc-pp

Assignees

No one assigned

Labels

backend:RISC-V

Projects

None yet

Milestone

No milestone

Development

Successfully merging this pull request may close these issues.

2 participants

@topperc @sihuan