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[WIP] feat(kernels): thread runtime lane id into TPipe via setSubBlockId#1241

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[WIP] feat(kernels): thread runtime lane id into TPipe via setSubBlockId#1241
yanghaoran29 wants to merge 1 commit into
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Under simpler PTO2 dispatch the CCE sub-block register is not programmed, so get_subblockid() returns 0 for both AIV lanes and TILE_UP_DOWN auto-split picks the wrong ring-buffer half. Replace direct get_subblockid() reads and manual cons/prod.setEntryOffset(lane * tile_bytes) workarounds with TPipe::setSubBlockId(get_sub_block_id(args)) from pto-isa PR #186.

Kernel changes (4 files):

  • examples/a5/.../bgemm/kernels/mix/kernel_bgemm.cpp get_subblockid() -> get_sub_block_id(args) + mPipe.setSubBlockId; +intrinsic.h
  • examples/a2a3/.../qwen3_14b_decode/kernels/aiv/fa_fused_aiv.cpp v36 setEntryOffset workaround -> v36.setSubBlockId(sub_block_id)
  • examples/a2a3/.../qwen3_14b_decode/kernels/aic/fa_fused_aic.cpp dead DAV_VEC block: sub_block_id param + setSubBlockId (consistency only)
  • tests/st/a2a3/.../spmd_paged_attention/.../paged_attention_parallel.cpp sij/pij/oi pipe setEntryOffset workaround -> setSubBlockId(sub_block_id)

Excluded per instruction: src/{a2a3,a5}/platform/onboard/aicore/kernel.cpp.

Onboard 3-state verification (pto-isa 5d211ba8, task-submit):

  • a2a3 qwen3_14b_decode: A PASS / B FAIL (k_cache max_diff=nan) / C PASS
  • a5 bgemm: A PASS / B PASS / C PASS

Execution plan and verification report are kept outside this repo:
../setsubblockid_plan.md, ../setsubblockid_verify_report.md

Under simpler PTO2 dispatch the CCE sub-block register is not programmed,
so get_subblockid() returns 0 for both AIV lanes and TILE_UP_DOWN auto-split
picks the wrong ring-buffer half. Replace direct get_subblockid() reads and
manual cons/prod.setEntryOffset(lane * tile_bytes) workarounds with
TPipe::setSubBlockId(get_sub_block_id(args)) from pto-isa PR hw-native-sys#186.

Kernel changes (4 files):
- examples/a5/.../bgemm/kernels/mix/kernel_bgemm.cpp
  get_subblockid() -> get_sub_block_id(args) + mPipe.setSubBlockId; +intrinsic.h
- examples/a2a3/.../qwen3_14b_decode/kernels/aiv/fa_fused_aiv.cpp
  v36 setEntryOffset workaround -> v36.setSubBlockId(sub_block_id)
- examples/a2a3/.../qwen3_14b_decode/kernels/aic/fa_fused_aic.cpp
  dead __DAV_VEC__ block: sub_block_id param + setSubBlockId (consistency only)
- tests/st/a2a3/.../spmd_paged_attention/.../paged_attention_parallel.cpp
  sij/pij/oi pipe setEntryOffset workaround -> setSubBlockId(sub_block_id)

Excluded per instruction: src/{a2a3,a5}/platform/onboard/aicore/kernel.cpp.

Onboard 3-state verification (pto-isa 5d211ba8, task-submit):
- a2a3 qwen3_14b_decode: A PASS / B FAIL (k_cache max_diff=nan) / C PASS
- a5 bgemm: A PASS / B PASS / C PASS

Execution plan and verification report are kept outside this repo:
  ../setsubblockid_plan.md, ../setsubblockid_verify_report.md
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coderabbitai Bot commented Jul 1, 2026

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Review Change Stack

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Organization UI

Review profile: CHILL

Plan: Pro

Run ID: 96188679-740d-4586-8fba-21de42d7894d

📥 Commits

Reviewing files that changed from the base of the PR and between 0a8bc94 and 8200b79.

📒 Files selected for processing (4)
  • examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/kernels/aic/fa_fused_aic.cpp
  • examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/kernels/aiv/fa_fused_aiv.cpp
  • examples/a5/tensormap_and_ringbuffer/bgemm/kernels/mix/kernel_bgemm.cpp
  • tests/st/a2a3/tensormap_and_ringbuffer/spmd_paged_attention/kernels/mix/paged_attention_parallel.cpp

📝 Walkthrough

Walkthrough

Multiple AIC/AIV kernel files switch from internally querying the sub-block id via get_subblockid() to threading a runtime-provided sub_block_id (or derived from args) into TPipe objects via setSubBlockId(), replacing prior manual cons/prod entry-offset computations for GM ring-buffer/lane placement.

Changes

Runtime sub-block id propagation

Layer / File(s) Summary
fa_fused_aic/aiv sub_block_id threading
examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/kernels/aic/fa_fused_aic.cpp, examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/kernels/aiv/fa_fused_aiv.cpp
fa_fused_aic gains a sub_block_id parameter passed into the TPipe via setSubBlockId; fa_fused_aiv replaces manual cons/prod offset logic with setSubBlockId(sub_block_id).
kernel_bgemm mix kernel sub-block id derivation
examples/a5/tensormap_and_ringbuffer/bgemm/kernels/mix/kernel_bgemm.cpp
Adds an intrinsic.h include and derives subBlockIdx from get_sub_block_id(args), applying it via mPipe.setSubBlockId(...) instead of get_subblockid().
paged_attention_parallel test pipe updates
tests/st/a2a3/tensormap_and_ringbuffer/spmd_paged_attention/kernels/mix/paged_attention_parallel.cpp
run_aiv replaces manual setEntryOffset computations on sij_pipe, pij_pipe, oi_pipe with setSubBlockId(sub_block_id) calls on each pipe.

Estimated code review effort: 3 (Moderate) | ~25 minutes

Possibly related PRs

  • hw-native-sys/simpler#1088: Prior work on fa_fused_aiv.cpp sub-block selection logic directly overlaps with this change's setSubBlockId/sub_block_id handling.
  • hw-native-sys/simpler#1155: Documents the root-cause/workaround for tile-pipe sub-block id issues that this PR resolves via get_sub_block_id(args)/setSubBlockId.

Suggested labels: enhancement

Poem

A rabbit hopped through kernel code,
Found offsets manually bestowed,
Now sub_block_id runs clean and true,
setSubBlockId sees it through,
Ring buffers split just right — hooray! 🐇✨

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. Write docstrings for the functions missing them to satisfy the coverage threshold.
✅ Passed checks (4 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly summarizes the main change: threading the runtime lane id into TPipe via setSubBlockId.
Description check ✅ Passed The description matches the code changes and explains the motivation, affected files, and verification.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.

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@yanghaoran29

yanghaoran29 commented Jul 1, 2026

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Related Sample Test Results

The table below summarizes the actual measured results of all executed test cases under the three-state verification matrix. Status code definitions: PASS = Test Passed / FAIL = Test Failed / - = Test Not Executed / Blocked.

Definition of Three-State Versions (Logic varies slightly across test cases)

Status Label Version Definition Description
A Baseline Code before defect fixing, or legacy/existing implementation with temporary compatibility workarounds
a2a3 platform: Uses setEntryOffset
a5 bgemm test case: Uses get_subblockid()
B Reproduction Compatibility workaround code removed, no new setSubBlockId fix logic added
a5 bgemm scenario: GM offset only corrected via get_sub_block_id
C Fixed New logic setSubBlockId(get_sub_block_id(args)) added, with original workarounds removed (final production delivery code)

Summary Table of Three-State Test Results

Platform Test Case Name Test Entry File Path A Baseline B Reproduction C Fixed
a2a3 qwen3_14b_decode examples/a2a3/tensormap_and_ringbuffer/qwen3_14b_decode/test_qwen3_14b_decode.py PASS FAIL PASS
a5 bgemm examples/a5/tensormap_and_ringbuffer/bgemm/test_bgemm.py PASS PASS PASS

Fix Description of Original Markdown Errors

  1. The original table row for a5 bgemm was incorrectly spliced to the end of the remarks column of the previous row, causing table formatting collapse; split into an independent table row.
  2. The remarks cell of the a2a3 row had an extra leading vertical bar | which disrupted column alignment, replaced with a standard placeholder -.
  3. Unified table column spacing and code inline formatting for consistent rendering on all Markdown parsers.
  4. Standardized title hierarchy, punctuation and line breaks to eliminate messy line wrapping issues in tables.

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Code Review

This pull request refactors how the AIV lane/sub-block ID is handled across several kernels, including Qwen3 decode, BGEMM, and SPMD paged attention. Instead of relying on the hardware get_subblockid() (which can be stale or 0 in certain runtimes) or manually calculating entry offsets, the runtime-provided sub-block ID is now threaded directly into the TPipe instances using setSubBlockId(). This allows the library's TILE_UP_DOWN auto-split mechanism to correctly place each lane in its own GM ring-buffer half. I have no feedback to provide as there are no review comments.

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