test: add validated NAO cases to CUDA CI

[GenZeal-Lin]

Summary

This PR adds validated GPU integration tests from 02_NAO_Gamma and
03_NAO_multik to the existing CUDA CI workflow.

The scope of this PR is intentionally limited to integrating cases that
currently pass on GPU. Cases that are not compatible with the current CUDA CI
configuration, or that currently show a reproducible CPU/GPU output
discrepancy, are retained as commented entries in CASES_GPU.txt and are not
executed by this PR. Issues requiring further investigation are tracked
separately.

Changes

• Add tests/02_NAO_Gamma/CASES_GPU.txt
  • 30 validated GPU cases
• Add tests/03_NAO_multik/CASES_GPU.txt
  • 58 validated GPU cases
• Extend .github/workflows/cuda.yml to run both case lists on GPU
• Set device gpu at CI runtime only for cases included in the corresponding
  CASES_GPU.txt
• Add an explicit fail-fast check when a listed case does not contain an
  INPUT file

No ABACUS source code, reference data, CPU test configuration, or failing
test cases are modified in this PR.

GPU validation

Local GPU validation was performed on an NVIDIA GeForce RTX 4090 using a
candidate patch based on commit:

0dca9dd7820bea3075e8e670f822269fb6732f18

(Fix: calculate net force after symmetrization (#7846))

For the local GPU validation, device gpu was injected into the selected
cases' INPUT files at runtime. The GPU build was executed through the local
abacus_gpu_timeout.sh wrapper.

02_NAO_Gamma

• Candidate scope: 32 cases
• Included in CUDA CI: 30 cases
• Excluded: 2 cases
• Directory-level GPU runs: 30
• Duplicate runs: 0
• Failed runs: 0
• Autotest result: PASS
• Autotest property checks: 222 passed

The final CASES_GPU.txt case set exactly matches the set of directory-level
cases successfully exercised in the GPU validation run.

03_NAO_multik

• Candidate scope: 65 cases
• Included in CUDA CI: 58 cases
• Excluded: 7 cases
• Directory-level GPU runs: 58
• Duplicate runs: 0
• Failed runs: 0
• Autotest result: PASS
• Autotest property checks: 646 passed

The final CASES_GPU.txt case set exactly matches the set of directory-level
cases successfully exercised in the GPU validation run.

In total, this PR adds 88 validated NAO cases to the CUDA CI path.

The missing-INPUT fail-fast guard was added after the GPU validation. It
does not change the execution path of the validated 88 cases because every
listed case currently contains an INPUT file.

Cases intentionally not enabled

The following cases are retained as commented entries in the corresponding
CASES_GPU.txt files so that the GPU lists preserve the structure of the
existing CPU case lists.

02_NAO_Gamma

• scf_FeBiTe
  • ks_solver = genelpa is not supported for GPU acceleration.
• scf_metagga
  • SCAN is unavailable in the tested build configuration
    (ENABLE_LIBXC=OFF).

03_NAO_multik

• scf_u_ramp
  • ks_solver = genelpa is not supported for GPU acceleration.
• scf_symm_prec
  • ks_solver = genelpa is not supported for GPU acceleration.
• scf_out_chg_tau
  • SCAN is unavailable in the tested build configuration
    (ENABLE_LIBXC=OFF).
• relax_cell_vdw4_d4
  • DFT-D4 support is disabled in the tested build configuration
    (ENABLE_DFTD4=OFF).
• relax_cell_vdw4_d4s
  • DFT-D4 support is disabled in the tested build configuration
    (ENABLE_DFTD4=OFF).
• scf_out_hsr_spin4
  • CPU and GPU calculations both finish successfully, but the GPU
    hrs1_nao.csr output retains additional near-zero H(R) entries around
    the fixed CSR sparse-output threshold, resulting in a different sparsity
    pattern. sr_nao.csr and rr.csr are byte-identical in file-level
    comparisons.
• nscf_out_hsr_tr_rr
  • CPU and GPU calculations both finish successfully and show the same H(R)
    CSR behavior: the GPU hrs1_nao.csr retains additional near-zero entries.
    sr_nao.csr, rr.csr, and trs1_nao.csr are byte-identical in
    file-level comparisons.

The H(R) CSR discrepancy was reproduced both on the original validation
baseline (0dca9dd78) and on a later develop revision (12ecc795f).
The observed GPU-only H(R) entries are near the fixed 1e-10 sparse-output
threshold. The upstream source of these near-zero residual values has not yet
been identified.

This behavior is tracked separately in #7860 and is intentionally not
addressed in this PR.

For the SCAN and DFT-D4 cases above, the descriptions only identify the first
confirmed limitation under the tested build configuration. They do not imply
that enabling the corresponding feature would necessarily make those cases
pass without further issues.

Scope

This PR only establishes CUDA CI coverage for currently validated
02_NAO_Gamma and 03_NAO_multik cases.

It intentionally does not:

• fix the H(R) CSR discrepancy tracked in [GPU][LCAO] H(R) CSR output keeps extra near-zero entries on GPU vs CPU #7860;
• modify ks_solver behavior;
• enable LibXC or DFT-D4;
• update reference results;
• modify ABACUS computational source code;
• change CPU integration test behavior;
• expand the task to other GPU test suites.

Those issues will be handled separately so that each PR has one focused
objective.