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Document initial setup #24

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4 changes: 4 additions & 0 deletions README.md
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Expand Up @@ -14,6 +14,10 @@ Here's a short list:
* PD SWD
* SOC SPI Flash (BIOS)

### Scripts

See [./scripts](./scripts) folder for scripts to capture logs, flash EC, ...

## CCD (Closed Case Debug)

EC & CPU UARTs can be accessed without opening the DUT (Device Under Test,
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4 changes: 4 additions & 0 deletions scripts/buspirate_ctrl.py
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Expand Up @@ -9,6 +9,10 @@
process can use it at a time. To control GPIO while a PTY bridge is
running, use signals (see below) or combinable flags.

Initial setup:
git submodule update --init
pip install -r BusPirate-BPIO2-flatbuffer-interface/python/requirements.txt

Wiring:
BP5 IO3 --> EC VCC1_RST (reset, active low)
BP5 IO4 (TX) --> EC CR_SIN1 (UART RX)
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