diff --git a/init/arch_specs/eessi_arch_riscv.spec b/init/arch_specs/eessi_arch_riscv.spec index aa56fcaa..cb799bd3 100644 --- a/init/arch_specs/eessi_arch_riscv.spec +++ b/init/arch_specs/eessi_arch_riscv.spec @@ -2,6 +2,10 @@ # CPU vendors: SiFive (0x489), Spacemit (0x710) # Software path in EESSI | Vendor ID | List of defining CPU features -"riscv64/sifive/p550" "0x489" "rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf" # HiFive Premier P550 -"riscv64/spacemit/x60" "0x710" "rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause" # Banana Pi F3 -"riscv64/spacemit/x60-k6.6" "0x710" "rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt" # Banana Pi F3 k6.6 +"riscv64/generic/rva20u64" "" "rv64imafdc" +"riscv64/generic/rva22u64" "" "rv64imafdc zfhmin" +"riscv64/generic/rva23u64" "" "rv64imafdciv zfhmin" +"riscv64/sifive/p550" "0x489" "rv64imafdch zicsr zifencei zba zbb sscofpmf" # HiFive Premier P550 (rva20 + hypervisor) +"riscv64/sifive/jh7110" "0x489" "rv64imafdc zicntr zicsr zifencei zihpm zca zcd zba zbb" # StarFive VisionFive 2 (rva20) +"riscv64/spacemit/x60" "0x710" "rv64imafdcv sscofpmf sstc svpbmt zicbom zicboz zicbop zihintpause" # Banana Pi F3 (rva22 + vector 1.0 (VLEN=256)) +"riscv64/spacemit/x60-k6.6" "0x710" "rv64imafdcv zicbom zicboz zicntr zicond zicsr zifencei zihintpause zihpm zfh zfhmin zca zcd zba zbb zbc zbs zkt zve32f zve32x zve64d zve64f zve64x zvfh zvfhmin zvkt sscofpmf sstc svinval svnapot svpbmt" # Banana Pi F3 k6.6 (rva22 + vector 1.0 (VLEN=256)) diff --git a/init/eessi_archdetect.sh b/init/eessi_archdetect.sh index 64d4131f..d1584d9d 100755 --- a/init/eessi_archdetect.sh +++ b/init/eessi_archdetect.sh @@ -17,7 +17,7 @@ else exit 1 fi -VERSION="1.2.0" +VERSION="1.3.0" # default log level: only emit warnings or errors LOG_LEVEL="WARN" @@ -154,6 +154,12 @@ cpupath(){ fi local cpu_flags=$(get_cpuinfo "$cpu_flag_tag") + if [ "${machine_type}" == "riscv64" ]; then + # RISC-V ISA strings use '_' as extension separators. + # Convert them to space-separated feature tokens so they + # can be matched like x86 CPU flags. + cpu_flags=${cpu_flags//_/ } + fi log "DEBUG" "cpupath: CPU flags of host system: '$cpu_flags'" # Default to generic CPU